unisonic technologies co., ltd uc3750 preliminary cmos ic www.unisonic.com.tw 1 of 8 copyright ? 2011 unisonic technologies co., ltd qw-r502-360.b 600 k hz pwm/pfm step-down dc-dc controller ? description the utc uc3750 is a high frequency, micropower, voltage mode step-down dc-dc controller ic and is designed for battery operated hand-held electronic products. it can provide up to 2.0a loading current with conversion efficiency by connection of appropriate external p-type mosfet. it also can be applied to operate for voltage regulation with minimum external components and board space. the utc uc3750 can operate in the constant -frequency pwm (pulse width modulation) mode that provide low output ripple noise in the normal operation and will automatically switch to pfm(pulse frequency modulation) mode at lo w output loads for higher efficiency. moreover, it is ideal fo r portable applicati ons profited from chip enable (ce) to reduce ic off-stage current and integrated feedback resistor network. the utc uc3750 is suitable for applications, such as pda, camcorders and digital still camera, hand-held instrument, distributed power system, computer peripheral, conversion from four nimh or nicd or one lithium-ion cells to 3.3v/1.8v. ? features * high efficiency: 92% (typ.) * low quiescent bias current :50 a * low shutdown current:0.3 a (typ.) * output voltage:1.8v~3.3v 2.0% * low output voltage ripple:50mv (typ.) * built-in soft-start (ss) * pulse width modulation (pwm)switching frequency:600khz * automatic pwm/pfm switchover under light load condition * very low dropout operation, 100% max. duty cycle * chip enable(ce) pin with on-chip 150na pull-up current source * input voltage 2.45v- 5.5v * internal under-voltage lockout (uvlo) protection * low profile and minimum external components ? ordering information ordering number package packing lead free halogen free UC3750L-XX-AF5-R uc3750g-xx-af5-r sot-25 tape reel note: xx: output voltage, refe r to marking information.
uc3750 preliminary cmos ic unisonic technologies co., ltd 2 of 8 www.unisonic.com.tw qw-r502-360.b ? marking information package voltage code marking sot-25 27: 2.7v 33: 3.3v 3 2 1 ufxx g 5 4 voltage code g: halogen free l: lead free ? pin configuration ? pin description pin no. pin name description 1 ce chip enable pin, active high (internal pull-up current source). by connecting this pin to gnd, the switching oper ation of the controll er will be stopped. 2 gnd ground connection 3 v out output voltage monitoring input. this pi n must be connected to the regulated output node as a feedback to on-chip control circuitry. v out is internally connected to the on-chip voltage divider that dete rmines the output voltage level. 4 ext gate drive for external p-mosfet. 5 v in power supply input ? block diagram
uc3750 preliminary cmos ic unisonic technologies co., ltd 3 of 8 www.unisonic.com.tw qw-r502-360.b ? absolute maximum rating (t a =25c, unless otherwise specified) parameter symbol ratings unit device power supply v in -0.3 ~ 6.0 v input voltage (ce) v ce -0.3 ~ 6.0 v output voltage (v out ) v out -0.3 ~ 6.0 v output voltage (ext) v ext -0.3 ~ 6.0 v junction temperature t j +150 c operating temperature t opr ? 40~+85 c storage temperature t stg ? 55~+150 c note: absolute maximum ratings are those values be yond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. ? thermal data parameter symbol ratings unit junction to ambient ja 250 c/w ? electrical characteristics (t a = 25c (typ. value), t a =-40c ~ 85c (min. and max. values), unless otherwise specified) uc3750-27(2.7v) parameter symbol test conditions min typ max unit total device input voltage v in 2.45 5.50 v output voltage v out i load = 0ma, t a = 25c 2.646 2.7 2.754 v input current into v out pin i i ( vout ) 2.5 4.0 a operating current i dd v in =5.0v, v ce =5.0 v (no external components) 50 80 a off-state current i off v in = 5.0v, v ce = 0v, t a = 25c 0.3 0.5 a oscillator frequency f osc 510 600 690 khz maximum duty cycle d max 100 % switchover on time threshold (note) t on 167 320 500 ns soft-start delay time (note) t ss 8.0 ms protection delay time t port auto restart 8.0 ms output drive (ext pin) ext ?h? output current i exth v ext =v in -0.4v -60 ma ext ?l? output current i extl v ext = 0.4 v 100 ma ext ?l-h? rise time t r c load = 1000pf,v in = 5.0v 65 ns ext ?h-l? fall time t f c load = 1000pf, v in = 5.0v 40 ns ext ?l-h? rise time t r c load = 5.0nf, v in = 5.0v 140 ns ext ?h-l? fall time t f c cload = 5.0nf, v in = 5.0v 90 ns ce (ce pin) ce ?h? input voltage v ceh 1.3 v ce ?l? input voltage v cel 0.3 v ce ?h? input current i ceh v in =v ce = 5.0v -0.5 0 0.5 a ce ?l? input current i cel v in =5.0v, v ce =0v -0.5 0.15 0.5 a under-voltage lockout under-voltage lockout threshold v uvlo 1.60 2.20 2.40 v under-voltage lockout hysteresis v uvlo ( hys ) 50 mv
uc3750 preliminary cmos ic unisonic technologies co., ltd 4 of 8 www.unisonic.com.tw qw-r502-360.b ? electrical characteristics uc3750-33(3.3v) parameter symbol test conditions min typ max unit total device input voltage v in 2.45 5.0v 5.50 v output voltage v out i load = 0ma, t a = 25c 3.234 3.3 3.366 v input current into v out pin i i ( vout ) 2.5 4.0 a operating current i dd v in =5.0v, v ce =5.0 v (no external components) 50 80 a off-state current i off v in = 5.0v, v ce = 0v, t a = 25c 0.3 0.5 a oscillator frequency f osc 510 600 690 khz maximum duty cycle d max 100 % switchover on time threshold (note) t on 167 320 500 ns soft-start delay time (note) t ss 8.0 ms protection delay time t port auto restart 8.0 ms output drive (ext) ext ?h? output current i exth v ext =v in -0.4v -60 ma ext ?l? output current i extl v ext = 0.4 v 100 ma ext ?l-h? rise time t r c load = 1000pf,v in = 5.0v 65 ns ext ?h-l? fall time t f c load = 1000pf, v in = 5.0v 40 ns ext ?l-h? rise time t r c load = 5.0nf, v in = 5.0v 140 ns ext ?h-l? fall time t f c cload = 5.0nf, v in = 5.0v 90 ns ce (ce) ce ?h? input voltage v ceh 1.3 v ce ?l? input voltage v cel 0.3 v ce ?h? input current i ceh v in =v ce =5.0v -0.5 0 0.5 a ce ?l? input current i cel v in =5.0v, v ce =0v -0.5 0.15 0.5 a under-voltage lockout under-voltage lockout threshold v uvlo 1.60 2.20 2.40 v under-voltage lockout hysteresis v uvlo ( hys ) 50 mv notes: 1. pwm/pfm switchover on time th reshold min/max guaranteed by design only.
uc3750 preliminary cmos ic unisonic technologies co., ltd 5 of 8 www.unisonic.com.tw qw-r502-360.b ? description information 1. detailed operating description the utc uc3750 is a step-down dc ? dc controllers designed specially in portable applications powered by battery cells. the utc uc3750 combines the advantages of pulse frequency modulation (pfm) and constant-frequency pulse width modulation (pwm) which can provide excellent efficiency with light loads and high efficiency and low output voltage ripple at heavy loads re spectively. this device can provide up to 2.0 a loading current with appropriate external p-type mosfet connected. because of working at high switching frequency, it? s possible to use small size surface mount inductor and ca pacitors to reduce pcb area and provide better interference handling for noise sensitive applications. 2. the internal oscillator the utc uc3750 needs an oscillator to govern the swit ching of a pwm control cycles. the utc uc3750 has an internal fixed ? frequency oscillator. the oscillator signal generates all the using ti ming signals. and the oscillator frequency is set to 600 khz 15%. 3. voltage reference and soft-start the utc uc3750 has a built-in soft-start (ss) circuit that cont rols the ramping up of the internal reference voltage during the power-up of the conver ter. this function effectively enables the output voltage rise gradually over the specified soft-start time (8 ms ty p.), which prevents the out put voltage from overshoot ing during startup of the converter. the utc uc3750 includes an internal high accuracy voltage refe rence. this reference vo ltage is connected to the inverting input terminal of the error amplifier (ea), a1, which compared with portion of the output volt age that is derived from an integrated voltage di vider with precise trimming to give the required output voltage with 2% accuracy. 4. voltage mode pulse width modulation (pwm) control scheme the utc uc3750 is working in constant-frequency pulse wi dth modulation (pwm) voltage mode control. the controller operates with the internal oscillator which generates the required ra mp function to compare with the output of the error amplifier (ea), a1. the error amplifier (ea) co mpares the internally divided-down output voltage with the voltage reference to produce an error volt age at its output. this error voltage is compared with the ramp function to generate the control pulse to dr ive the external power switch. on a cycle-by -cycle basis, the greater the error voltage is greater; the switch is held on longer. hence, corre sponding corrective action will be made to keep the output voltage within regulation. constant -frequency pwm reduces output volta ge ripple and noise, which is one of the important characteristics for noise sensitive communication applications. the high switching frequency allows small size surface mount components to improve layout comp actness, reducing pc board ar ea, eliminating audio and emission interference. 5. power-saving pulse-frequency-modulation (pfm) control scheme the converter enters the discontinuous conduction mode (dcm) operation when the load is decreasing, which means the inductor current w ill decrease to 0 before the next switching cycle starts. in dcm operation, the on time for each switching cycle will decrease significantly when the output current decreases. in order to maintain high conversion efficiency even at light load conditions, the on ti me for each switching cycle is closely monitored and for any on time is smaller than the preset value (320 ns), the switching pulse will be skipped. as a result, when the loading current is small, the converter will be operating in a ?constant on time (320 ns nominal), variable off time? pulse frequency modulation (pfm) mode. this innovative c ontrol scheme improves the c onversion efficiency for the system at light load and standby operating conditions hence extend the operating life of the battery. 6. low power shutdown mode once the ce pin is tied to gnd the utc uc3750 can?t work. in shutdown mode, the internal reference, oscillator, control circuitry, driver and internal feedback volt age divider are turned off and the output voltage falls to 0 v. because most of the intern al circuits can?t work and th e current paths are cut-off, t he device consume rather small in this condition. 7. under-voltage lockout (uvlo) the utc uc3750 incorporated the uvlo to pr event operation of the p-channel mosfet below rated input voltage levels. the comparator will turn-off the control ci rcuitry and shut the converter down, once the input supply voltage drops below about 2.2 v.
uc3750 preliminary cmos ic unisonic technologies co., ltd 6 of 8 www.unisonic.com.tw qw-r502-360.b ? description information(cont.) 8. inductor value calculation selecting the proper inductance must ta ke an inductor?s physical size, transient respond and power conversion requirements into consideration. the fa ct is that lower inductor value can make the cost, pc board space smaller and can provide faster transient respon se while resulting in higher ripple current and core losses. the loading current, i out = 0.5a and the inductor ripple current, i l ? ripple(p ? p) is designed to be less than 40% of the load current, i.e. 0.5a x 40% = 0.2a. the relations hip between the inductor value and inductor ripple current is as followed: ) p - p ( ripple - i ) v - i r - v ( t = l l out out ) on ( ds in on where r ds (on) is the on resistance of the external p-channel mosfet. 9. p-channel power mosfet selection the operation of utc uc3750 must be used with an external p-channel power mosfet. the main keys for the power mosfet are the gate threshold, v gs , the ?on? resistance, r ds (on) and its total gate charge, q t . low input voltage operation need a low gate thres hold device that can work down to the minimum input voltage level. r ds (on) determines the conduction losses for each switching cycle, t he lower the on resistance, the higher and the efficiency can be achieved. a power mosfet with lower gate charge c an give lower switching losses but the fast transient can cause unwanted emi to the system. compromi se is required during the design stage. 10. flywheel diode selection the flywheel diode is turned on and carries load current during the off time. the average diode current depends on the p-channel switch duty cycle. at high input voltages, the diode conducts most of the time. in case of v in approaches v out , the diode conducts only a small fraction of the cy cle. while the output te rminals are shorted, the diode will subject to its highest stress. under this condition, the diode must be able to safely handle the peak current circulating in the loop. so, it is impor tant to select a flywheel diode that can meet the di ode peak current and average power dissipation requirements. under normal conditions, t he average current conducted by the flywheel diode is given by: out f in out in d i v + v v - v = i where i d is the average diode current and v f is the forward diode voltage drop. a fast switching diode must also be used to optimize effi ciency. schottky diodes are ideal for low forward drop and fast switching times. 11. input and output capacitor selection (c in and c out ) in continuous mode operatio n, the source current of the p-channel mosfet is a square wave of duty cycle (v out +v f )/v in . we must select a low esr input capacitor t hat can support the maximu m rms input current to prevent large input voltage transients. the maximum rms input current, can be estimated by the equation below: in 2 1 out in out out ) max ( rms v ) v - v ( v i i i rms (max) has a maximum value at v in = 2v out , where i rms (max) = i out /2. as a general practice, this simple worst-case condition is used for design. selecting of th e output capacitor, the required effective series resistance (esr) of the capacitor decide the c out and the capacitance will be adequate for filtering unless the esr requirement is met. the output voltage ripple, v ripple is approximated by: ) c f 4 1 (esr+ r - i v out osc p) - (p ipple l ripple where f osc is the switching frequency and esr is the effectiv e series resistance of the output capacitor. we can see from equation 4 that the output voltage ripple c ontributed by two parts. for a better performance, low esr tantalum capacitors should be used. the major cont ributor is the capacitor esr for most. ordinary aluminum-electrolytic capacitors have high esr and should be avoided while higher quality low esr aluminum-electrolytic capacitors are acceptable and relati vely inexpensive. surface-mo unt tantalum capacitors are better and provide neat and compact soluti on for space sensitive applications.
uc3750 preliminary cmos ic unisonic technologies co., ltd 7 of 8 www.unisonic.com.tw qw-r502-360.b ? description information(cont.) 12. pcb layout recommendations good pcb layout is important in switching mode power conversion. careful pcb layout can minimize ground bounce, emi noise and unwanted feedbacks that can affect the converter performance. 13. grounding the output power return ground, the input power return ground and the device power ground should be connected at the star-ground. feedba ck signal path must be separated from the main current path and sensing directly at the anode of the output capacitor. all high current running paths must be thick enough for current flowing through and producing insignificant voltage drop along the path. 14. components placement power components including input capacitor, inductor and ou tput capacitor must be plac ed as close as possible. all connecting traces must be short, direct and thick. in order to avoid unwanted injection of noise into the feedback path high current flowing and switching paths must be kept away from the feedback pin terminal. 15. feedback path feedback of the output voltage must be separated from the power path. the output voltage sensing trace to the feedback pin should be connected to the output voltage directly at t he anode of the output capacitor.
uc3750 preliminary cmos ic unisonic technologies co., ltd 8 of 8 www.unisonic.com.tw qw-r502-360.b ? typical application circuit 1 v in m ce gnd ce v in ext v out sd v out gnd gnd 2 3 4 5 c in c out l utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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